First official details of AMD's next-gen 'Mustang Peak' Threadripper CPUs come into view — chips feature DDR5, PCIe 6.0, and a new socket

We've already heard quite a lot about AMD's next-generation EPYC processors, code-named Venice, and we've heard a fair bit about the consumer Zen 6 parts, too, particularly in their Olympic Ridge and Medusa Point guises. Now, thanks to Budapest-based low-level programming enthusiast InstLatX64 (@InstLatX64 on X), we now have the first confirmed details about AMD's Zen 6-based Threadripper CPUs, code-named Mustang Peak. There's no shockers here, and there's not a ton of information to work from, but we can still do some interesting speculation.

The key details that we actually have confirmed are this: Zen 6-based Threadripper parts are internally codenamed "Mustang Peak," and they're going to use Core Complex Dies (CCDs) built on a 2nm-class process at TSMC. We can infer that it's almost assuredly using the same CCDs as Olympic Ridge and Venice, but more on that in a bit. We know that it's going to be based on DDR5 memory and PCI Express 6.0, and likely because of the latter, it's going to require a new platform, known as "TR6."

InstLatX64 found this information in AMD's technical documentation portal, which we unfortunately don't have access to, though you can clearly see the front page of the document above. That's most of the story right there, but there are, nevertheless, some pretty interesting details we can deduce from this information.

For starters, the core counts. AMD's Zen 6 processors are expected to use "Powderhorn" CCDs that raise the core count per chiplet from 8 cores to twelve. This raises the max number of CPU cores on a desktop Ryzen processor from 16 to 24, and it increases the potential max number of cores on a Threadripper Pro CPU from 96 to a whopping 144 cores. Furthermore, we can speculate that clock rates will likely increase considerably, as Zen 6 is said to be a design that aims for clock rates "significantly above" 6 GHz.

A chip with 288 hot-clocked full-power CPU threads is likely to draw massive power, but it's absolutely going to want monstrous memory bandwidth. How do we feed the beast? Not with DDR6, as that standard isn't even finished yet, despite the fact that LPDDR6 is a go. It's possible AMD may be increasing the channel count from 8, as it's known that EPYC Venice is increasing memory channels from 12 on Turin to fully sixteen 64-bit channels (a 1024-bit memory bus). In combination with second-generation MRDIMMs, that's going to give Venice some 1.6 TB/second memory bandwidth.

Could AMD add MRDIMM support to Threadripper? It's certainly possible. Threadripper has always been derived from EPYC technology, and it doesn't seem a stretch to think that the rank-interleaving RAM could solve the memory bandwidth struggle that high-end Mustang Peak chips are going to slam into in massively multi-core workloads. After all, you're not going to reach 12.8 GT/s (the transfer rate of second-generation MRDIMMs) through regular old EXPO overclocking.

Besides that, PCI Express 6.0 will deliver up to 256 GB/second bidirectionally (128GB/second unidirectionally) on a by-sixteen link, which should probably suffice for nearly any sort of device you care to plug into one of these machines. I almost wrote "PCs," but with 144 CPU cores and PCI Express 6.0, we're hardly in "personal computer" territory anymore. Indeed, it's clear that Mustang Peak is going to be an absolute monster when it eventually arrives next year, likely in mid-to-late 2027.

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