AMD 3D V-Cache teardown shows the majority of the Ryzen 7 9800X3D is dummy silicon

It's been over a month since AMD launched its Ryzen 7 9800X3D processor which quickly established itself as the fastest gaming CPU in the world. To investigate AMD's design philosophy, semiconductor analyst Tom Wassick (via Hardwareluxx) took apart the chip, and the findings of his first report suggest that a large part of the Ryzen 7 9800X3D is just dummy silicon for structural integrity. Still, AMD has extracted a lot of performance from its second-generation 3D V-Cache design, landing a solid victory against Intel's Arrow Lake chips.

Ryzen 9000 X3D processors are structured to slot the L3 SRAM cache chiplet below the heat-generating CCD (the compute die with the eight CPU cores). This allows for higher clock speeds by offering more thermal headroom, though AMD never exactly detailed the ins and outs of its stacking methodology. The report mentions that both the CCD and 3D V-Cache chiplets are thinned down to sub 10µm levels to expose the TSVs for hybrid bonding. Coupled with BEOL (Back-end of Line) - the section with the necessary metal layers for connectivity - the total SRAM and CCD package comes in at 40-45µm thick.

The SRAM die has always been a fraction of the size of the compute die; Ryzen 7000 3D V-Cache chiplets measured 36mm-squared in contrast to the 66.3mm-squared CCD. Tom Wassick's findings state that the SRAM die is actually 50µm larger than the CCD on all four sides. Realistically speaking, a large portion of this die should be empty, but we still await more details.

Excluding interconnects, the SRAM and CCD should add up to less than 20µm thick. To accommodate such small and fragile components, AMD has added a bulky layer of dummy silicon at the top and the bottom for structural integrity. The thickness of the entire package is roughly in the ballpark of 800µm. Subtracting the 50µm die stack (CCD, SRAM, and BEOL) lands us at 750µm of structural support at the top. In other words, 93% of the total stack comprises just dummy Silicon to keep the dies intact.

The different layers are connected through a coating of oxide between them. It is reported that this binding layer is thinner between the core CCD and SRAM than between the dummy silicon and the two dies, to allow for better thermal performance.

There remain several unanswered questions and Tom Wassick plans to address them with the help of a Scanning Electron Microscope in a future follow-up. Despite losing its gaming throne to AMD, Intel has no plans to counter AMD's 3D V-Cache technology, at least for the mainstream segment. Nonetheless, we expect AMD to announce the 12-core and 16-core Ryzen 9 9900X3D and the Ryzen 9 9950X3D at CES next month.